Patent Filing•Grant Date: 2026-06-23
Patent: SILTRONIC AG
Entity
SILTRONIC AG
Grant Date
2026-06-23
Source Record
PROCESS FOR MANUFACTURING SEMICONDUCTOR WAFERS CONTAINING A GAS-PHASE EPITAXIAL LAYER IN A DEPOSITION CHAMBER
PROCESS FOR MANUFACTURING SEMICONDUCTOR WAFERS CONTAINING A GAS-PHASE EPITAXIAL LAYER IN A DEPOSITION CHAMBER